Intel has announced three new advanced chip packaging tools at SEMICON West. The new interconnect and packaging technologies all aid Intel’s engineers in building compact, scalable, and modular processor and System-on-Chip packages that are more flexible in today’s applications, and easier to manufacture, than the potentially prohibitively large, monolithic silicon dominating the market for decades.
The first is an update to Intel’s EMIB, or Embedded Multi-die Interconnect Bridge, called Co-EMIB. You might remember the original tech from the perverse AMD/Intel crossover known as Kaby Lake G. Weird times. But now it’s back and better than ever, offering interconnectivity between two or more Foveros elements with performance “essentially” that of a single, monolithic chip.
Foveros technology allows for a die top be vertically connected above necessary I/O through a substrate. Essentially silicon stacked on top of silicon and in full working order. Powered by the second tech announced today, ODI, or Omni-Directional Interconnect, this would allow for both EMIB and Foveros technologies to be effectively combined, allowing for a modular chip with both vertical and horizontal interconnectivity.